1. Field of Invention
The present invention relates to a chip package and a substrate thereof, and more particularly to a chip package and a substrate thereof disposing pads at both sides.
2. Related Art
As shown in FIG. 1, a conventional multi-chip module (MCM) 1 includes a substrate 11, a plurality of chips 12 stacked upon the substrate 11, a plurality of bonding wires 13 connected the chips 12 with the substrate 11, and an encapsulating material 14 disposed on the substrate 11 and covered the chips 12 and the wires 13.
The multi-hip module (MCM) 1 will be malfunctioned if any one of the chips 12 is damaged or two of the bonding wires 13 are a short circuit. Many problems are also induced, such as the reliability of the MCM is reduced, the yield of fabricating processes is reduced, and the manufacturing cost is increased. The solution in the prior art of the above-mentioned problems is performing a functional test to the chips 12 first. Then choosing those the qualified chips, which are passed the functional test and are also so-called known good die (KGD), to form the multi-chip module (MCM) 1. The reliability of the multi-chip module (MCM) 1 is thus improved by removing the fault parts of the chips 12.
As shown in FIGS. 2a and 2b, a conventional multi-package module (MPM) 3 is a stacked MPM. The multi-package module (MPM) 3 includes a plurality of flip-chip packages 31 and 32. The flip-chip package 31 is stacked on a substrate 321 of the flip-chip package 32.
More pads 322 are disposed on one surface the substrate 321 as the signal terminals, the ground terminals, the power terminals, and the test terminals of the flip-chip packages 31, 32 in the multi-package module (MPM) 3. The pads 322 are disposed in highly concentrated such that the layout of the internal circuit of the substrate 321 becomes complicated and hard. More particularly, the problem of short circuits during fabrications or the electrical interference, such as crosstalk for example, is induced as the increasing in layout density. Thus, the design cost and manufacturing cost of the substrate 321 are further increased to solve those problems. On another hand, the heat dissipating of the flip-chip package 32 is limited by the stacked flip-chip package 31.
Accompanying to the electronic products, such as the chip package and the multi-package module, trend to a compact size, the substrate has to be scale-down. It is therefore an important subject of the present invention to provide a chip package and a substrate thereof having sufficient pads to be used for signal terminals, ground terminals, power terminals, and test terminals of the chips or the packages within a smaller scale of substrate.